The THC63LVD104C

THC63LVD104C is Thine LVDS receiver capable of supporting data transmission between host and TFT display, up to SXGA resolution. This IC chip converts LVDS data streams into CMOS/TTL signal, either by the rising edge or falling edge of the clock signal.

Features of THC63LVD104C

  • Wide dot clock range from 8MHz to 12MHz suitable for NTSC and up to SXGA resolution
  • PLL allow no external components
  • output clock duty cycle is 50%
  • TTL clock is edge programmable
  • Power down mode is available
  • Single 3.3V CMOS low power design
  • come with 64pin TQFP
  • fail-safe mode for open LVDS input


Application of THC63LVD104C

Thine LVDS receiver THC63LVD104C can be used in IP Security Camera. It allows high resolution image to be captured and transmit the data through LVDS signalling.

IP security camera
Thine LVDS used in IP security camera

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Thine THC63LVD1023B

THC63LVD1023B is Thine LVDS transmitter designing to support transmission link between host and display.  It converts CMOS/TTL data bits into LVDS data stream. There is a dedicated pin on the chip to be programmed for rising edge or falling edge clocks.

THine THC63LVD1023B


  • flexible input/output mode
    1. single/dual TTL in, single/dual LVDS out
    2. double edge input for single TTL in/dual LVDS out
    3. input port SW for single TTL in/dual LVDS out
    4. asynchronous dual TTL in/dual LVDS out
  • clock edge selectable
  • PLL requires. No external components
  • 3 LVDS data mapping for simplifying PCB layout
  • pseudo random pattern generation circuit
  • support reduced swing LVDS for low EMI
  • power down mode
  • low power single 3.3V CMOS design
  • backward compatible with THC63LVD1023
  • 144pin LQFP
  • wide dot clock range suited for TV signal (480i-1080p), PC signal (VGA-XGA)
  • TTL/CMOS input:  10~160MHz
  • LVDS output:  20~160MHz